Job Title: MTS, Physical Design           

Job Location: Bangalore, India (This position requires a full-time, on-site presence in our Bangalore, India Office)         

Job ID: AI2554        

Job Description:      

Role & responsibilities:    

• Perform hands-on physical design of blocks (from synthesis to GDS) and handle complex block and/or sub-system implementation.
• Handle all aspects of Physical Design as needed which may include bump planning and coordination with SoC floorplan but not limited to these. 
• Own the design of multiple blocks as a technical lead as needed. 
• PPA optimization. 
• Develop and validate high performance and/or low- power clock network guidelines. 
• Perform block-level place and route and close the design to meet timing, area and power constraints. 
• Drive the logic equivalency RTL2Synthesis and Synthesis2APR netlist. 
• Generate and implement ECOs to fix timing, noise and EM-IR violations. 
• Run physical design verification flow at block level and provide guidelines to fix LVS/DRC violations to other designers. 
• Participate in establishing P&R flows and physical design methodologies for correct-by-construction designs. 
• Assist in flow development and/or refinement for RTL2GDSII
• Partner with STA teams to refine clock distribution networks, evaluate power-optimized clock gating and clock implementation strategies.
• Architect and extend infrastructure using TCL, Python, and Perl scripts to streamline physical design metrics reporting, automate regression suites, and explore AI/ML-driven closure techniques.
• Serve as the central point of contact for physical design convergence, aligning RTL, DFT, STA workflows while providing technical mentorship to team members.
• Write scripts in TCL/Perl/Python to achieve productivity enhancements through automation.     

Minimum Requirements:    

• BE/BTECH or ME/MTECH 12+ years of experience in physical design using 7 nm or lower. 
• DDR PD expertise is a must, expertise with 3DIC or PCIE-high speed interface is also good. 
• Timing Signoff experience with SNPS or industry standard tools 
• PDN: IR signoff and Physical verification knowledge 
• Automation skills python/Perl/TCL 
• Proficiency in automation to drive improvements in PPA. 
• Experience working on multiple technology nodes in advanced processes. 
• Design level knowledge to optimize the implementation for PPA.    

Personal Attributes:      

Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.