Software engineer
- Location
- San Francisco
- Type
- Full time
- Compensation
- $150k-$200k
- Posted
- 2 days ago
Join a team building useful software. Work closely with engineering and design to turn new ideas into products.
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Country: Greece
Brand: Capgemini Engineering
Reference: 449114-en_GB
Contract type: Permanent
Experience level: Experienced Professionals
Professional community: Products & Systems Engineering
Business unit: Engineering and RandD Services
We are looking for a highly skilled Design Verification Engineer with strong expertise in System Verilog, UVM methodology, and hands-on experience with DDR protocols. In this role, you will be a key contributor to verifying complex, high-performance digital IP and SoC designs used in next‑generation semiconductor products.
You'll collaborate closely with architects, designers, and fellow verification engineers to ensure robust, high‑quality designs that meet stringent performance and reliability requirements.