ADVANCE YOUR CAREER. ADVANCE THE WORLD. 

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. 

 

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE

Join our team to drive customer success on AMD Adaptive SoC and AI Edge devices across a broad range of customer applications. You will be a technical point of contact for customer cases, from early design-in and bring-up through production support.

The role is weighted toward silicon debug: finding and closing issues while the customer's design is still being brought up and characterized, so nothing surprises them at ramp. You will root-cause failures across the processing subsystems, interconnect, memory and boot path, and drive each fix with the design, IP, firmware, software and field teams that own the pieces. You will also own the embedded Linux release and the documentation customers build from. Both halves matter, because the failures worth your time rarely sit cleanly on one side of the hardware/software boundary.

THE PERSON

You have a passion for system architecture, silicon debug, and embedded systems design. You are comfortable working across the full stack, from memory controller specifications and timing reports to building Linux images from source. You are drawn to problems that arrive without a clear owner or a clear root cause, and you are systematic about narrowing them down. You are a self-starter: you can pick up an unfamiliar tool or flow and make progress on your own, and you know when to bring in the right specialist rather than stall. You are a team player with excellent written and verbal communication skills and experience collaborating with engineers located in different sites and timezones, and you can hold a technical conversation directly with a customer. We place a high value on technical writing. You produce documentation a customer can follow independently, and you can present a complex technical finding clearly to both engineering and customer audiences.

KEY RESPONSIBILITIES

Customer Support and Solutions: Own escalated customer support issues, from pre-production bring-up and characterization through production support. Reproduce the failure, isolate it to a block or a layer, and drive it to a validated fix with the design, IP, firmware, software or validation team that owns it. Debug at the register level over JTAG, by boot stage, and against timing reports.

System Level Integration: Work across the whole device, covering processing subsystems, Network-on-Chip, memory controllers (DDR5/6, LPDDR5/6), boot and storage (OSPI, UFS, SD/eMMC), and programmable logic. Integrate and configure these subsystems in Vivado and Vitis, and generate the device images, hardware handoff (XSA) and system device tree that the software build consumes.

Technical Documentation and Customer Communication: Author the customer documentation set, including product guides, user guides, datasheets and tutorials, and respond to technical escalations.

Performance Analysis and Tuning: Isolate bottlenecks across the hardware/software boundary. Understand the configuration levers available at each layer, explain the expected cause and effect before changing one, and prove the result by measurement.

Embedded System Development: Build and customize embedded Linux images with the Yocto-based Embedded Design Flow, covering BSPs, device trees, kernel and rootfs tuning, and custom recipes and layers. Generate and debug boot images across the boot chain, and write low-level software for the on-chip processors.

Design Validation: Develop RTL in SystemVerilog/Verilog and prove it on hardware. Build the test designs, automation and results analysis needed to validate a feature, and debug customer designs when they do not behave as expected.

Apply AI to Engineering Workflows: Use AI/LLM/ML tools to surface design gaps, summarize and correlate large test and log datasets, and drive productivity in debug, automation and documentation.

PREFERRED EXPERIENCE

• Extensive hands-on experience with FPGA/SoC platforms in a silicon debug, applications, validation, or systems engineering role, built across multiple device generations and product cycles.
• Working knowledge of end-to-end SoC architecture: processing subsystems, on-chip interconnect, memory controllers (DDR5/6, LPDDR5/6) with their scheduling, arbitration and QoS behavior, boot and storage blocks (OSPI, UFS, SD/eMMC), and programmable logic.
• Excellent technical writing, with a track record of authoring and publishing customer-facing documentation that an external audience builds from: product guides, user guides, datasheets and tutorials.
• Proven functional failure debug on real hardware: reproducing intermittent and system-level failures, isolating them across the hardware, firmware and software boundaries, and driving them to root cause using register-level JTAG debug (xsdb or equivalent), serial console, ILA, oscilloscopes and logic analyzers.
• Solid RTL fundamentals in SystemVerilog, Verilog, and/or VHDL. AMD/Xilinx FPGA experience preferred, with strong skills in Vivado or an equivalent FPGA toolchain.
• Hands-on experience with embedded Linux flows: building and customizing images with a Yocto-based flow such as PetaLinux or the Embedded Design Flow (BSPs, device trees, kernel configuration, custom recipes and layers), Linux kernel and driver knowledge covering UIO and character drivers, interrupt routing, reserved memory and real-time scheduling, strong C/C++ for application and bare-metal programming on embedded processors, and automation in Python, Tcl and Shell. Equivalent depth in OpenEmbedded, Buildroot, or AOSP build systems will be considered.
• Working knowledge of clocking, CDC, timing closure and static timing analysis, with a proven ability to debug timing violations.
• Proven experience in at least one of the following areas: performance analysis and tuning on real hardware; or boot and configuration flows on FPGA or SoC platforms, including boot image generation, platform management firmware, secure boot, bootloaders and runtime reconfiguration of programmable logic.
• Demonstrated use of AI in engineering workflows, applying AI/LLM/ML tools to identify design gaps, summarize collected data for distribution and analysis, and drive productivity in debug, automation and documentation.
• A track record of supporting customers directly, working cross-functionally across design, software, validation and field teams, and running technical reviews.

 

This role is not eligible for visa sponsorship.

 

#LI-RL1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.